IEEE Design & Test of Computers, Mar/Apr 2008

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Short description:

The Current State of Test Compression - Progress in test compression. - Historical perspective on scan compression. - VirtualScan: Test compression technology using combinational logic and one-pass ATPG. - UMC-Scan Test Methodology: Exploiting the maximum freedom of multicasting. - Hierarchical test compression for SoC designs. Design and Test of RFIC Chips - Loopback DFT for low-cost test of single-VCO-based wireless transceivers. - Wireless system for microwave test signal generation. Error Tolerance An illustrated methodology for analysis of error tolerance. PDF | 6.1 MB

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The Current State of Test Compression
- Progress in test compression.
- Historical perspective on scan compression.
- VirtualScan: Test compression technology using combinational logic and one-pass ATPG.
- UMC-Scan Test Methodology: Exploiting the maximum freedom of multicasting.
- Hierarchical test compression for SoC designs.

Design and Test of RFIC Chips
- Loopback DFT for low-cost test of single-VCO-based wireless transceivers.
- Wireless system for microwave test signal generation.

Error Tolerance
An illustrated methodology for analysis of error tolerance.

PDF | 6.1 MB

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